About

A buck converter steps down DC voltage through high-frequency switching, requiring precise component selection to maintain regulation under load. Incorrect inductor sizing causes the converter to enter discontinuous conduction mode (DCM), increasing output ripple voltage ΔV_out and risking load malfunction. Undersized capacitors fail to absorb ripple current, leading to thermal runaway and premature failure. This calculator derives minimum inductance L_min, output capacitance C_out, and input capacitance C_in from your operating parameters using standard CCM (Continuous Conduction Mode) equations. It assumes ideal switching with optional correction for MOSFET R_DS(on), diode forward drop V_D, and inductor DCR. Results approximate steady-state behavior and do not model transient response or control loop stability.

Formulas

The ideal duty cycle in continuous conduction mode relates output to input voltage directly. Accounting for diode forward voltage drop V_D and MOSFET on-resistance modifies the effective ratio.

D = V_out + V_DV_in − I_out ⋅ R_DS(on) + V_D

The minimum inductance to maintain CCM is derived from the volt-second balance across the inductor during the switch-on interval. The inductor ripple current ΔI_L = r ⋅ I_out, where r is the ripple ratio (typically 0.3).

L_min = (V_in − V_out) ⋅ DΔI_L ⋅ f_sw

Output capacitance is sized to meet the output voltage ripple specification. This assumes ripple is dominated by capacitor charge/discharge rather than ESR.

C_out = ΔI_L8 ⋅ f_sw ⋅ ΔV_out

Input capacitance absorbs pulsating current drawn by the high-side switch.

C_in = I_out ⋅ D ⋅ (1 − D)f_sw ⋅ ΔV_in

Power dissipation is estimated from conduction and switching losses.

P_cond = I_out² ⋅ (D ⋅ R_DS(on) + R_DCR) + I_out ⋅ (1 − D) ⋅ V_D

P_sw = 12 ⋅ V_in ⋅ I_out ⋅ (t_r + t_f) ⋅ f_sw

Where D = duty cycle, V_in = input voltage, V_out = output voltage, I_out = output current, f_sw = switching frequency, ΔI_L = peak-to-peak inductor ripple current, ΔV_out = output voltage ripple, ΔV_in = input voltage ripple, V_D = diode forward voltage, R_DS(on) = MOSFET on-resistance, R_DCR = inductor DC resistance, t_r = rise time, t_f = fall time.

Reference Data

Parameter	Symbol	Typical Range	Unit	Notes
Input Voltage	V_in	3.3 - 60	V	Source supply rail
Output Voltage	V_out	0.6 - 48	V	Must be < V_in
Output Current	I_out	0.1 - 30	A	Maximum continuous load
Switching Frequency	f_sw	100 - 2000	kHz	Higher f → smaller L, more switching loss
Inductor Ripple Ratio	r	0.2 - 0.4	-	ΔI_L ÷ I_out. Typical 0.3
Output Voltage Ripple	ΔV_out	10 - 100	mV	Peak-to-peak specification
Input Voltage Ripple	ΔV_in	50 - 500	mV	Acceptable source ripple
MOSFET R_DS(on)	R_DS(on)	5 - 200	mΩ	On-resistance at V_GS rated
Diode Forward Drop	V_D	0.3 - 0.7	V	Schottky: 0.3 - 0.5 V typical
Inductor DCR	R_DCR	5 - 100	mΩ	DC copper resistance of winding
Capacitor ESR	R_ESR	1 - 200	mΩ	Ceramic: 1 - 10, Electrolytic: 50 - 200
Switch Rise Time	t_r	5 - 50	ns	MOSFET turn-on transition
Switch Fall Time	t_f	5 - 50	ns	MOSFET turn-off transition
Duty Cycle (Ideal)	D	0.01 - 0.99	-	V_out ÷ V_in
Minimum Inductance	L_min	0.1 - 1000	μH	For CCM boundary
Standard Inductor Values	-	0.1, 0.22, 0.33, 0.47, 0.68, 1.0, 1.5, 2.2, 3.3, 4.7, 6.8, 10, 15, 22, 33, 47, 68, 100, 150, 220, 330, 470 μH (E12 series)
Standard Capacitor Values	-	0.1, 0.22, 0.47, 1.0, 2.2, 4.7, 10, 22, 47, 100, 220, 470, 1000 μF (E6 series)
Typical Efficiency	η	85 - 97	%	Depends on V_in/V_out ratio and f_sw

Frequently Asked Questions

In discontinuous conduction mode, the inductor current reaches zero before the next switching cycle begins. The output voltage becomes load-dependent and the transfer function changes to a nonlinear relationship. Voltage ripple increases, transient response degrades, and the control loop designed for CCM may become unstable. Always select an inductor value at least 20-30% above the calculated minimum L_min to maintain a safety margin against CCM/DCM boundary operation at light loads.

Increasing switching frequency f_sw reduces the required inductance and capacitance proportionally, enabling smaller physical components. However, switching losses scale linearly with frequency: P_sw = ½ × V_in × I_out × (t_r + t_f) × f_sw. Above approximately 500 kHz, switching losses dominate and efficiency drops. Gate drive losses (C_iss × V_GS² × f_sw) also become significant. The practical optimum for most designs falls between 200 kHz and 1 MHz.

Output ripple has two components: the capacitive ripple (ΔI_L / (8 × f_sw × C_out)) and the ESR ripple (ΔI_L × R_ESR). With ceramic capacitors (ESR of 1-10 mΩ), the capacitive component dominates. With electrolytic capacitors (ESR of 50-200 mΩ), ESR ripple dominates and is often 5-10× larger than the capacitive term. For tight ripple specs below 20 mV, ceramic capacitors or paralleled electrolytics with low aggregate ESR are mandatory.

The peak inductor current is I_peak = I_out + ΔI_L/2. The inductor saturation current rating must exceed this peak value with margin. Saturation causes inductance to collapse, spiking switch current and potentially destroying the MOSFET. Select an inductor with a saturation rating at least 20% above I_peak and an RMS current rating exceeding I_out. Core material matters: ferrite saturates sharply while powdered iron degrades gradually.

The calculator uses a diode forward drop V_D parameter to model the freewheeling path. For synchronous designs using a low-side MOSFET instead of a diode, set V_D to a very small value (e.g., 0.01 V) to approximate the near-zero body diode conduction during dead time. Conduction losses in the low-side FET should then be estimated separately by adding I_out² × (1 − D) × R_{DS(on)_low} to the total loss. The duty cycle equation simplifies toward the ideal V_out/V_in ratio in synchronous topologies.

The ripple ratio r = ΔI_L / I_out defines the peak-to-peak current swing as a fraction of DC load current. A ratio of 0.3 (30%) is the standard industry starting point, balancing inductor size against ripple performance. Lower ratios (0.1-0.2) require larger inductors but reduce output ripple and improve transient response. Higher ratios (0.4-0.5) allow smaller inductors but increase RMS losses in the inductor and capacitor, and risk entering DCM at lighter loads. Values above 0.5 approach the CCM/DCM boundary at 50% load.