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Category Code Utilities

Input Value Prefix: 0x (hex), 0b (bin), 0o (oct), or plain decimal. Negative sign allowed in signed mode.

Shift Amount

Bit Width

Operation

Sign Mode

Quick Presets

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About

Bit shift errors propagate silently. A single miscalculated shift in an embedded system driver can corrupt register values, cause buffer overflows, or produce hardware faults that cost weeks of debugging. This calculator performs all five shift variants - logical left (SHL), logical right (SHR), arithmetic right (SAR), rotate left (ROL), and rotate right (ROR) - with exact two's complement semantics across 8, 16, 32, and 64-bit widths. Results display in decimal, hexadecimal, octal, and a per-bit binary grid so you can verify each bit position visually.

The tool accepts input in decimal, hexadecimal (0x prefix), binary (0b prefix), or octal (0o prefix) notation. Signed mode interprets values using two's complement representation. Note: shifting by an amount equal to or exceeding the bit width is defined here as producing zero for logical shifts and preserving the sign bit for arithmetic shifts, matching x86 behavior where the shift count is masked to width − 1 bits. If you need platform-specific wrap semantics, verify against your target ISA manual.

Formulas

Logical left shift multiplies the operand by a power of two, discarding bits that exceed the register width.

result = (x << n) & mask

where mask = 2^w − 1 and w is the bit width.

Logical right shift fills vacated high bits with zero.

result = (x & mask) >>> n

Arithmetic right shift preserves the sign bit via replication.

result = x >> n , with MSB filled by x[w − 1]

Rotate left wraps overflow bits from MSB to LSB positions.

ROL(x, n) = (x << n) | (x >>> (w − n))

Rotate right wraps underflow bits from LSB to MSB positions.

ROR(x, n) = (x >>> n) | (x << (w − n))

Variable legend: x = input value, n = shift amount, w = bit width (8, 16, 32, or 64), mask = bitmask limiting result to w bits. The & operator is bitwise AND, | is bitwise OR.

Reference Data

Operation	Symbol	MSB Fill	LSB Fill	Equivalent Math	Use Case
Logical Left Shift	SHL / <<	Discarded	0	x × 2ⁿ	Fast multiplication by powers of 2
Logical Right Shift	SHR / >>>	0	Discarded	x ÷ 2ⁿ (unsigned)	Unsigned division, bitmask extraction
Arithmetic Right Shift	SAR / >>	Sign bit	Discarded	⌊x ÷ 2ⁿ⌋ (signed)	Signed division preserving sign
Rotate Left	ROL	From LSB	From MSB overflow	Circular permutation	Cryptography, CRC, hash functions
Rotate Right	ROR	From LSB underflow	From MSB	Circular permutation	Cryptography, barrel shifters
Bit Width: 8	byte	Range unsigned: 0 - 255, signed: −128 - 127
Bit Width: 16	word	Range unsigned: 0 - 65535, signed: −32768 - 32767
Bit Width: 32	dword	Range unsigned: 0 - 4294967295, signed: −2147483648 - 2147483647
Bit Width: 64	qword	Range unsigned: 0 - 18446744073709551615, signed: −9223372036854775808 - 9223372036854775807
x86 Shift Mask (32-bit)	-	Shift count masked to 5 bits (0 - 31)
x86 Shift Mask (64-bit)	-	Shift count masked to 6 bits (0 - 63)
ARM Barrel Shifter	-	Supports all 5 shift types in single instruction cycle
Two's Complement	-	Negative x stored as 2^w − \|x\|
Sign Extension	-	Replicate MSB when widening from n to m bits
Overflow Detection	-	Left shift overflow when discarded bits ≠ 0 (or sign bit)

Frequently Asked Questions

Logical right shift (>>>) fills vacated high-order bits with 0, treating the operand as unsigned. Arithmetic right shift (>>) replicates the sign bit (MSB) into vacated positions, preserving the two's complement sign. For unsigned values they produce identical results. For negative signed values, arithmetic shift yields a negative result (floor division by 2ⁿ), while logical shift produces a large positive number.

Behavior varies by architecture. On x86, the shift count is masked: for 32-bit values, count & 31; for 64-bit, count & 63. This calculator applies the same masking by default. A shift of 32 on a 32-bit value is equivalent to a shift of 0 under x86 masking. ARM behaves differently: shifting by the full width produces 0 for logical shifts. Always check your target ISA.

In signed mode with bit width w, values from 0 to 2^w−1 − 1 are positive. Values from 2^w−1 to 2^w − 1 represent negative numbers. The calculator accepts negative decimal input and converts it to two's complement binary automatically. For example, −1 in 8-bit is 0xFF (255 unsigned).

Rotate operations preserve all bits - no information is lost. They are critical in cryptographic algorithms (AES uses byte rotation, SHA-256 uses 32-bit rotates), CRC computation, and hash functions. Unlike linear shifts, rotates are reversible: ROR(ROL(x, n), n) = x. Use them when you need bit permutation without data loss.

Yes. If any of the n most-significant bits being shifted out are non-zero, data is lost. For signed values, overflow also occurs when the sign bit changes. This calculator masks the result to the selected bit width, which silently discards overflow bits. The binary visualization highlights discarded bits so you can see when overflow occurs. In production code, check the discarded bits: overflow = x >>> (w − n) ≠ 0.

Use standard programming prefixes: 0x for hexadecimal (e.g., 0xFF), 0b for binary (e.g., 0b10110011), and 0o for octal (e.g., 0o377). Unprefixed numbers are parsed as decimal. The calculator validates that the value fits within the selected bit width and sign mode before computing.